Asic Design Engineer: Average Salary in Mountain View, CA in 2024

RTL ASIC Design Engineers with 8 to 15+ years of experience. Exp with Logic design /micro-architecture / RTL coding is a must. Experience in Synthesis / Understanding of timing concepts for ASIC is required. Experience in design of DDR / USB /SATA/ PCIe controller or such complex protocols is a plus...

As a Senior ASIC designer, you will be involved in the design and integration of advanced and complex ASICs through the following assignments:. SLAC National Accelerator Laboratory Senior ASIC Design Engineer Menlo Park , California Apply Now. SLAC National Accelerator Laboratory seeks a ...

As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of Software and Hardware in our data centers including technologies such as AWS Inferentia, which is a machine learning inference accelerator designed to deliver high performance a...

Extensive experience in front-end ASIC RTL digital logic design using Verilog or System Verilog. With every generation the max bandwidth, the lowest latency, the lowest area, and lowest power requirements are more exacting and require sophisticated planning in order to achieve on Apple's schedules!B...

Keep abreast of the latest ASIC/SoC design flows and EDA tools. Bachelor's and/or Master's degree in Electrical Engineering, Computer Engineering Computer Science, or related fields. And we’re powering it all with the world’s most advanced technologies for chip design and software security. We offer...

Staff ASIC Design Engineer page is loaded. Title: Staff ASIC Design Engineer. Minimum of 5-8 year ASIC design experience. Solid ASIC design (micro-architecture/implementation) and debugging skills. ...

Interacts and communicates with design teams performing logical design, logical verification, analog circuit design and verification, and layout design. You'd leverage your understanding of computer architecture, mixed-signal design, off-chip signaling, RTL development, design-for-test, and logical ...

Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and cafe, social interest groups, and philanthropy), with the startup culture and breadth of growth...

Working closely with our Director of ASIC Engineering and partnering closely with our brilliant functional R&D teams, you will work in a dynamic, cross-functional, collaborative work environment and be responsible for designing, verifying, and validating our core products. Electronic/Electrical Engi...

As an ASIC Design Engineer in the Pixel IP DMA team, you will work closely with architecture, design, and verification teams to build dedication and low power DMA engines. Experience working multi-functionally with architecture, design, and verification teams to specify, design, and debug designs. E...

Synopsys is seeking a talented RTL Design Engineer and an expert in microarchitecture, RTL development for our next-generation ARC-V processor IP. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. And we'...

Contribute to MatX’s silicon design and physical design methodology with a scalable solution across blocks, subsystems, fullchip designs from RTL to GDS. RTL-to-silicon experience in driving physical design for subsystems and/or top-level functions with ASICs and SOCs from early RTL design and netli...

Analog Circuit Design, Mixed Signal IC Design, Standard Cell, Analog Computing, AI tensor. Develop efficient circuit designs meeting performance, power and area target. Work with a layout designer to implement the layout of circuit. What's more, our passion propels us to dive headlong into the realm...

As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth. Strong cache design background including good understanding of different memory organiz...

Analog Circuit Design, Mixed Signal IC Design, Standard Cell, Analog Computing, AI tensor. Role: AI Tensor Development Engineer, full time based in Bay Area. Develop efficient circuit designs meeting performance, power and area target. Work with a layout designer to implement the layout of circuit. ...

Extensive experience in front-end ASIC RTL digital logic design using Verilog or System VerilogTight-knit collaboration skills with excellent written and verbal communication skills. With every generation the max bandwidth, the lowest latency, the lowest area, and lowest power requirements are more ...

PRINCIPAL SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). ...

As an ASIC Design Engineer, the individual’s primary responsibility will be RTL design. Proven track-record in digital design including RTL design experienceStrong understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back annotation...

As a Senior ASIC designer, you will be involved in the design and integration of advanced and complex ASICs through the following assignments:. SLAC National Accelerator Laboratory seeks a Senior Application Specific Integrated Circuit (ASIC) design engineer within the Integrated Circuits Department...

Working closely with our Director of ASIC Engineering and partnering closely with our brilliant functional R&D teams, you will work in a dynamic, cross-functional, collaborative work environment and be responsible for designing, verifying, and validating our core products. Electronic/Electrical Engi...

Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and café, social interest groups, and philanthropy), with the startup culture and breadth of growth...

ASIC DESIGN ENGINEER, DDR IP (SILICON ENGINEERING). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). ASIC/FPGA Desig...

As a member of Microchip’s engineering community, your primary responsibility will be to the design, integration, and verification support of the Full Chip Architecture and Full Chip Control/Data busses for an advanced ASIC or FPGA. Detailed module design and integration, performance analysis and de...

As a ASIC Design Engineer, you work with a team creating hardware accelerator IP to be deployed in a range of Amazon devices. ASIC design experience including owning end to end design of major SOC blocks. Help define and own ASIC design methodologies. Experience working closely with physical design ...

We are now looking for a Senior ASIC Floorplan Design Engineer!. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical i...