Top Level Microarchitecture

Eridu AI isa Silicon Valley hardware startup focused on accelerating training and inference performance for large AI models. Today's AI model performance is often gated by infrastructure bottlenecks. Eridu AI introduces multiple industry-first innovations across semiconductors, software and systems to deliver solutions that improves AI data center performance to increase GPU utilization while simultaneously reducing capex and power. Eridu AI's solution and value proposition have been widely validated with several hyperscalers.

The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins , co-founder of Infinera (NASDAQ : INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World's leading micro-LED display company and developer of the first augmented reality contact lens).

Position Overview

We are seeking a Top Level Microarchitecture Engineer to define and implement our industry-leading Networking IC. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking devices.

Responsibilities :

• Design and architect microarchitecture for Ethernet packet processing engine.
• Collaborate with cross-functional teams, including hardware design, software engineering, and product management, to define requirements and deliver high-performance solutions.
• Conduct feasibility studies and performance analysis to optimize packet processing throughput, latency, and power efficiency.
• Implement and verify microarchitecture designs using simulation tools and FPGA emulation.
• Work with Chip Architects and Physical Design teams to develop the appropriate microarchitecture.
• Develop a coherent test plan in collaboration with the design verification group.
• Investigate and resolve complex issues working closely with cross-functional teams including hardware engineers, firmware developers, and system architects.

Qualifications :

Why Join Us?

At Eridu AI, you'll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.

The pay range for this role is :

230,000 - 325,000 USD per year (San Francisco Bay Area)

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