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Staff Machine Learning ASIC Design Verification Engineer

Staff Machine Learning ASIC Design Verification Engineer

NutanixSan Diego, CA, United States
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Overview

QUALCOMM is the world's leading developer of next-generation wireless and multimedia technology.

We are searching for an ASIC design verification engineer interested in developing world-class solutions for the next generation of AI / ML HW IP.

Required Skills / Experience

  • Strong analytical and debugging skills
  • Good working experience with C / C++
  • Strong knowledge of Object Oriented Programming (OOP) concepts
  • Hardware verification languages (HVL) : SystemVerilog testbench (UVM), and / or SystemC
  • Hardware description languages (HDL) : Verilog and SystemVerilog
  • Knowledgeable in one or more of the following disciplines is preferred : Display (Pixel processing / composition / compression, MIPI DSI, DisplayPort, HDMI etc.), Bus / interconnect (AHB, AXI)
  • Strong knowledge of digital circuits and event-driven simulators
  • Knowledgeable with Perl, Python, TCL, tcsh, and GNU Make
  • Strong communication skills (written and verbal) to convey complex information to peers.
  • Detailed oriented and be able to plan and prioritize tasks effectively.

Preferred Qualifications

  • Prior experience delivering Verilog and / or System Verilog RTL
  • Detail oriented with strong analytical and debugging skills
  • Strong communication (written and verbal), collaboration, and specification skills
  • Practiced working experience with some of the following concepts :

    • Clock domain crossing and reset architecture

  • Machine Learning HW development
  • FIFOsimplementation
  • Busimplementation / verificationtechniques
  • Memory selection and control
  • High speed and low power design optimization
  • Bus interface protocols (AHB, AXI)
  • Experience with some of the following

    • Simulation and code coverage tools (VCS, Verdi, Modeltech / Questa, or Xcelium)

  • Design rule and CDC checking (SVA assertions, Spyglass, 0-in, etc.)
  • Scripting languages (PERL, Python, TCL, C, etc.)
  • Power Intent and Analysis : UPF, CLP, PTPX, PowerPro
  • Synthesis : DCG / NXT, FC
  • Static Timing : Primetime
  • Formal Verification : Conformal, Formality

    • Minimum Qualifications

  • Legally permitted to work on-site in Canada
  • 5+ years of ASIC design, verification, or related work experience.

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