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Principal Engineer - FPGA / ASIC Design

Principal Engineer - FPGA / ASIC Design

JobgetherUS
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This position is posted by Jobgether on behalf of a partner company. We are currently looking for a Principal Engineer - FPGA / ASIC Design in the United States.

We are seeking a Principal Engineer specializing in FPGA and ASIC design to drive the development of advanced digital systems in mission-critical applications. This role involves architecting, coding, simulating, and verifying complex FPGA / ASIC solutions for high-reliability electronic control systems. The ideal candidate will work closely with cross-functional engineering teams to implement innovative solutions, ensure compliance with industry standards, and support both testing and deployment across multiple sites. This position offers the opportunity to solve challenging technical problems while contributing to the design of next-generation hardware systems in a collaborative, hybrid work environment.

Accountabilities

  • Lead the design, development, verification, integration, and testing of FPGA and ASIC solutions for electronic control systems.
  • Develop RTL using VHDL, Verilog, or SystemVerilog, and perform simulations to validate designs.
  • Create detailed design documentation, verification plans, and test benches in compliance with relevant industry standards.
  • Achieve timing closure, optimize power utilization, and ensure performance and reliability of FPGA / ASIC designs.
  • Evaluate design flows, including synthesis, place and route, and timing constraints.
  • Collaborate with engineering teams across multiple sites, supporting lab testing and debugging activities.
  • Apply scripting and automation using languages such as TCL, Python, or Shell scripts to improve workflows.
  • Participate in system-level modeling and design using tools like MATLAB, Simulink, or SysML.
  • Maintain accurate records and documentation to support certification and project review processes.

Requirements

  • Bachelor’s degree in Electronics Engineering, Computer Engineering, or related field with 5+ years of experience, or Master’s with 3+ years, or PhD in a relevant discipline.
  • U.S. citizenship is required for this role.
  • Proven experience in FPGA / ASIC design, verification, and lab validation using tools such as Xilinx or Actel flows.
  • Strong proficiency in hardware description languages (VHDL, Verilog, SystemVerilog) and RTL design methodologies.
  • Familiarity with FPGA timing closure, test bench development, and simulation tools.
  • Experience in Windows and Linux development environments, version control (Git, SVN), and scripting languages.
  • Knowledge of model-based design, systems engineering, and SysML modeling tools such as Cameo Systems Modeler (MagicDraw).
  • Strong problem-solving, communication, and documentation skills to convey complex technical information to multiple stakeholders.

    • Benefits

  • Competitive annual salary : $113,179 – $183,916.
  • Comprehensive Total Rewards package including health, dental, vision, disability, life insurance, and AD&D coverage.
  • Flexible work schedule with hybrid options; relocation assistance available.
  • Retirement savings plan with company match (401k).
  • Paid time off, paid parental and family care leave, and paid holidays.
  • Tuition reimbursement, professional development opportunities, and long-term incentive plans.
  • Employee Assistance Program and employee discounts.

    • Jobgether is a Talent Matching Platform that partners with companies worldwide to efficiently connect top talent with the right opportunities through AI-driven job matching.

    When you apply, your profile goes through our AI-powered screening process designed to identify top talent efficiently and fairly.

    🔍 Our AI evaluates your CV and LinkedIn profile thoroughly, analyzing your skills, experience, and achievements.

    📊 It compares your profile to the job’s core requirements and past success factors to determine your match score.

    🎯 Based on this analysis, we automatically shortlist the 3 candidates with the highest match to the role.

    🧠 When necessary, our human team may perform an additional manual review to ensure no strong profile is missed.

    The process is transparent, skills-based, and free of bias — focusing solely on your fit for the role. Once the shortlist is completed, we share it directly with the company that owns the job opening. The final decision and next steps (such as interviews or additional assessments) are then made by their internal hiring team.

    Thank you for your interest!

    #LI-CL1

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    Principal Design Engineer • US