Senior ADC Architect

Mulya TechnologiesFort Collins, CO, United States

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Senior ADC Architect and Lead

Location : Austin / Milpitas / Fort Collins / Billerica

Hybrid

We are at the forefront of Wideband Signal Processing™ delivering high-performance, low-power analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other mixed-signal IP cores. These components are crucial for a wide array of modern applications, including artificial intelligence (AI) infrastructure, advanced wireless communications like :

5G networks and optical communications
Automotive networking, LiDAR, and radar systems
SatComm, Software Defined Radio (SDR) and other broadband communications

Senior ADC Architect and Lead

Milpitas / Austin / Bangalore / Fort Collins / Billerica

Engineering – IP Architecture /

Full-time /

Hybrid

ADC architect and development lead focusing on high-performance analog-to-digital converters. The successful candidate in this role will work with customers to understand requirements, and will lead the development of high performance transistor level design starting from initial specification, through design and layout supervision, silicon evaluation and characterization to final product introduction to market.

Qualifications

10-20 years of experience in high-performance analog or mixed-signal IC development in advanced CMOS processes

Thorough familiarity with high-speed, high-resolution analog-to-digital (ADC) or digital-to-analog (DAC) data converter design techniques. Experience in designing high performance building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc.

Must have a track record of successfully taking designs to production

Ability to work with customers to define products that address needs

Must have experience with evaluating silicon on bench and familiarity with standard lab equipment

Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis

Experience with analog and digital behavioral modeling, and / or synthesis of digital control blocks

Familiar with Cadence schematic capture, virtuoso, Spectre and / or HSPICE circuit simulation tools

MATLAB understanding would be preferred but not mandatory

Familiar with designing circuits for electromigration and ESD compliance in submicron CMOS process

Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes

Must be able to work independently, create and adhere to schedules

Must possess strong written and verbal communication skills with an ability to work with teams spread across geographic locations

Should be able to seek help proactively as well as share and pass on knowledge

Contact : Uday

Mulya Technologies

muday_bhaskar@yahoo.com

"Mining The Knowledge Community"

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Senior Architect • Fort Collins, CO, United States

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