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System-on-Chip Design Engineer
System-on-Chip Design EngineerCypress HCM • Folsom, CA, US
System-on-Chip Design Engineer

System-on-Chip Design Engineer

Cypress HCM • Folsom, CA, US
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This range is provided by Cypress HCM. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$80.00 / hr - $90.00 / hr

Description :

  • We are seeking an experienced System-on-Chip (SoC) Performance Modeling Engineer to join our team. The ideal candidate will have a strong background in performance modeling of memory systems using C++, as well as experience in trace collection and profiling from GPU and TPU workloads. Proficiency in C++ and Python, along with solid software engineering practices, is essential.

Duties :

  • Performance Modeling : Develop and maintain detailed performance models of memory systems using C++, ensuring accurate simulation and analysis of system behavior.
  • Trace Collection & Profiling : Design and implement methodologies for collecting and analyzing traces from GPU and TPU workloads to identify performance bottlenecks and optimization opportunities.
  • Performance Analysis : Conduct in-depth analysis of memory subsystem performance, utilizing both analytical models and cycle-accurate simulators.
  • Documentation & Reporting : Prepare comprehensive reports detailing performance findings, recommendations, and best practices.

    • Requirements :

  • Minimum Educational Background : Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related field.
  • A minimum of 5 years of experience in SoC performance architecture, with a focus on memory systems.
  • Technical Proficiency :
  • Strong programming skills in C++ and Python.
  • Experience with performance modeling tools and simulators.
  • Familiarity with GPU and TPU architectures and workloads.
  • Analytical Skills : Proven ability to analyze complex systems and identify performance optimization opportunities.
  • Communication Skills : Excellent verbal and written communication skills, with the ability to convey complex technical concepts to diverse audiences.
  • Preferred Qualifications :
  • Software Engineering Practices : Demonstrated experience in applying software engineering best practices, including version control, testing, and code reviews.
  • Industry Knowledge : Familiarity with the latest trends and advancements in SoC design and performance optimization.

    • Compensation :

  • $80-90 / hr W—2
  • JP 5204

    • Seniority level

    Seniority level

    Mid-Senior level

    Employment type

    Employment type

    Contract

    Job function

    Job function

    Engineering and Information Technology

    Industries

    Semiconductor Manufacturing and Computers and Electronics Manufacturing

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    Roseville, CA $130,500.00-$300,000.00 2 months ago

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    Design Engineer • Folsom, CA, US

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