Engineer I-Design (ASIC)

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the

• Aggregate System
• and it’s won us countless awards for diversity and workplace excellence.Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.Visit our page to see what exciting opportunities and company await!
• Job Description :
• Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.Microchip Technology Inc. has a Engineer I - Design opening based in San Jose, CA. The successful candidate will be responsible for designing, simulating, and verifying various RTL-based blocks on our devices. Microchip’s designs are an SOC with various hard and soft IP blocks that support many industry standard protocols for Imaging, Networking System Connectivity, Compute and Data Storage.
• Duties & Responsibilities :
• General RTL and ASIC development
• Detailed module design, performance analysis and detailed design specification creation.
• Participate in the RTL implementation, synthesis, simulation, pre-layout / post-layout timing verification.
• Understanding of emerging high speed design techniques to improve Data & Command processing bandwidth, reduce latencies & increase reliability.
• Support porting the design into test chips and emulation platforms – experience with FPGA design and board implementation tools is advantageous.
• Requirements / Qualifications :
• Bachelor’s in Electrical Engineering, Computer Engineering or Computer Science.
• Design courses and practical application of course learning for high-speed RTL design.
• Experience with RTL Design tools that include design entry, synthesis, formal verification, RTL / gate level simulation, cross-domain clocking analysis and static timing analysis.
• Course and Practical usage in RTL design, design verification, synthesis & formality.
• Proficiency in SystemVerilog development languages.
• Course and Practical usage in Static Timing Analysis and Verilog simulation tools.
• Should be able to design complex state machines & data path logic.
• Proficiency in scripting languages (TCL / Perl / Python) and LINUX.
• Ability to understand and implement industry standards.
• Ability to write detailed design specifications.
• Good analytical, oral and written communication skills.
• Able to write clean, readable presentations.
• Self-motivated, proactive team player.
• Ability to work to schedule requirements.
• Preferred
• Master’s in Electrical Engineering, Computer Engineering or Computer Science.
• FPGA and ASIC System On Chip Design Experience.
• Lab Experience for system-level validation.
• Travel Time :
• 0% - 25%
• Physical Attributes :
• Hearing, Seeing, Talking, Works Alone, Works Around Others
• Physical Requirements :
• 80% sitting, 10% standing, 10% walking, 100% inside
• Pay Range :
• We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below : The annual base salary range for this position, which could be performed in California, is $68,640 - $128,000.\
• Range is dependent on numerous factors including job location, skills and experience.Microchip Technology Inc is an equal opportunity / affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. For more information on applicable equal employment regulations, please refer to the .
• To all recruitment agencies
• Microchip Technology Inc.
• does not
• accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
• At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission.

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