Senior FPGA / ASIC Assurance Engineer

Job ID :

• TAP00041 Position : Senior FPGA / ASIC Assurance Engineer Location : US – MD, Fort Meade (or surrounding area) Category : Hardware Clearance Requirement : Active TS / SCI w / full scope polygraph Education Requirement : BS in Electrical Engineering, Computer Science (or related technical field) Experience Requirement : 14+ Years TAP is seeking to hire a Senior FPGA / ASIC Assurance Engineer to join our team!
• If you are a highly motivated engineer who enjoys a challenging and dynamic environment where your contributions are both critical and valued, this company will provide you the tools and opportunity to thrive.
• The Senior FPGA / ASIC Assurance Engineer is a Subject Matter Expert in FPGA and / or ASIC development to support FPGA / ASIC Assurance efforts in support of DoD.
• In this role, you will be responsible for reviewing and evaluating various vendor FPGA assurance tools to make sure the tools function in the way they are advertised to function, and to make sure the function of the tool actually provides some level of FPGA assurance.

Required Qualifications :

Technical writing, communication, and interpersonal skills Desired Qualifications :

Reverse Engineering experience DoD 8570 compliance

Government Security Clearance include, but are not limited to :