Overview :
All potential candidates should read through the following details of this job with care before making an application.
PDF Solutions is the acknowledged commercial leader in parametric characterization systems, pioneering the use of short-flow Characterization Vehicle (RESUME) Test Chips for developing and ramping new technologies and products, and has hundreds of validated results from Integrated Yield Ramp engagements over the past two decades.
PDF Solutions has provided over 100 RESUME test chips at 10nm and below. RESUME test chips are proven to represent the process-layout interactions critical to validate and monitor for high-yielding, stable production.
Position Summary :
The RESUME Design Engineer develops test structures & small circuits to be implemented on those vehicles. Starting points are known processing or layout issues that have to be characterized, which also includes the characterization of devices.
Understanding the requirement to characterize a problem will lead to designing a test structure. Considering how it can be tested will drive how those test structures are then arranged, accessed and laid out within a test chip.
After delivering layout, the RESUME Design Engineer will support test & analysis of those test structures and circuits. PDF has developed considerable IP in this area and new RESUME R&D Design Engineers join in this effort.
Over time, RESUME Design Engineers will become acknowledged experts in Design for Manufacturability (DFM) for integrated circuits (IC).
Responsibilities :
- The minimum requirement for the position is a Masters Degree in Electrical Engineering.
- Hands-on experience in design (schematics & layout) of small circuit blocks.
- Hands-on experience in manual layout.
- Hands-on experience with CADENCE design tools.
- Hands-on experience with DRC & LVS (Mentor Calibre).
- Hands-on experience with device level circuit simulation tools (SPICE).
- Excellent computer skills (both UNIX and Windows PC).
- Excellent written and oral communication skills.
- Highly professional, self-motivated and self-managed.
Qualifications :
- 2+ years or more relevant experience.
- Basic understanding of Design-of-Experiment (DOE) techniques and issues.
- Functional understanding of basic test structure design, especially for process-related test structures such as Combs, Serpentines, Chains, etc.
Experience in more complex test structures (MOSFET, BJT, Antenna evaluation, memory cell evaluation, etc.) is also appropriate.
- Basic understanding of test procedures to measure test structures and tester equipment to do so.
- Understanding of processing steps involved in advanced semiconductor manufacturing processes (e.g., sequence and purpose of typical FIN CMOS device processing steps 14nm and below).
- Hands-on experience with PDF Solutions software tools like Extensio, REC, LCP etc.
Pay Range :
USD $(phone number removed) - USD $(phone number removed) / Yr.
J-18808-Ljbffr
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