Job Description :
RTL design Engineer with strong experience in high speed PCIe designs and protocols, digital design principles in SoC and / or IP development, must have design background in Arteris NoC (Network on Chip) RTL generation or based on any other NoC tool
Responsibilities :
- years of related technical engineering experience
- Experience with ARM Fabric IPs.
- Experience with IPXACT.
- Understanding of Computer Architecture fundamentals.
- Ability to write scripts using Python, Tcl, Perl etc.
- Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus.
Experience :
- MUST HAVE design background in Arteris NoC (Network on Chip) RTL generation or based on any other NoC tool.
- Proficiency with UPF (Low power intent)
- Proficiency in clock crossing techniques.
- Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals. NoC tool
Skills :
- years of experience applying digital design principles in SoC and / or IP development.
- Proficient in Verilog / System Verilog coding constructs.
- Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting)
- Experience with high speed PCIe designs and protocols.
- Experience with Industry standard interface protocols such as AXI, APB, etc.
Education :
BS or MS in Electrical Engineering (or equivalent)
About US Tech Solutions :
US Tech Solutions is a global staff augmentation firm providing a wide range of talent on-demand and total workforce solutions.
To know more about US Tech Solutions, please visit .
US Tech Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity,
national origin, disability, or status as a protected veteran.
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