Search jobs > San Jose, CA > Design verification

IP Design Verification Engineer

ByteDance
San Jose
Full-time

ResponsibilitiesFounded in 2012, ByteDance's mission is to inspire creativity and enrich life. With a suite of more than a dozen products, including TikTok, Helo, and Resso, as well as platforms specific to the China market, including Toutiao, Douyin, and Xigua, ByteDance has made it easier and more fun for people to connect with, consume, and create content.

Why Join UsCreation is the core of ByteDance's purpose. Our products are built to help imaginations thrive. This is doubly true of the teams that make our innovations possible.

Together, we inspire creativity and enrich life - a mission we aim towards achieving every day. To us, every challenge, no matter how ambiguous, is an opportunity;

to learn, to innovate, and to grow as one team. Status quo? Never. Courage? Always. At ByteDance, we create together and grow together.

That's how we drive impact - for ourselves, our company, and the users we serve. Join us. About the team : This team is at the forefront of technological innovation, specializing in the design, development, and production of CPUs for ByteDance data center servers.

Leveraging a team of highly skilled engineers, researchers, and experts, the unit focuses on creating high-performance, energy-efficient, and reliable chips that power a wide range of electronic devices and systems.

Responsibilities - Develop UVM based test bench - Develop simulation methodology for automated and re-usable environments.

  • Define and execute test plan towards coverage target- Support performance verification, power-aware simulation, RTL / FW co-simulation, and GTL simulation.
  • Debugging regression failures- Improve and refine verification processQualificationsMinimum Qualifications : - Bachelor of Science in Computer Science, Electrical Engineering, or related fields- Industry experience as Design Verification Engineer- Experience with mix signal simulation Preferred Qualifications : - In-depth knowledge of UVM, System Verilog, Makefile, Perl, Python, and C / C++- In-depth knowledge of AMBA CHI-E, ACE-lite 4 / 5 protocols, SMMU, IO Coherency, and Scheduler- Experience with chip interlinking protocols like UCIe, CXL and CCIX - Autonomous, result-oriented, milestone-driven, and a thorough approach to work- Proven ability to work well in a team- Have skills : NVMe, SR-IOV, S-IOV, and Compression algorithm ByteDance is committed to creating an inclusive space where employees are valued for their skills, experiences, and unique perspectives.

Our platform connects people from across the globe and so does our workplace. At ByteDance, our mission is to inspire creativity and enrich life.

To achieve that goal, we are committed to celebrating our diverse voices and to creating an environment that reflects the many communities we reach.

We are passionate about this and hope you are too. ByteDance Inc. is committed to providing reasonable accommodations in our recruitment processes for candidates with disabilities, pregnancy, sincerely held religious beliefs or other reasons protected by applicable laws.

If you need assistance or a reasonable accommodation,

30+ days ago
Related jobs
Promoted
TechEra Global Inc
Cupertino, California

We are seeking a talented Design Verification Engineer to join our team. Collaborate with design teams to define verification requirements and ensure alignment with design specifications. Participate in design reviews offering insights on design for testability. Proficient in digital design verifica...

Promoted
SpaceX
Sunnyvale, California

DDR IP DESIGN ENGINEER (SILICON ENGINEERING). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). Own the high quality ...

https:/www.energyjobline.com/sitemap.xml
San Jose, California

This is an exciting opportunity to work in the AMD SOC Verification Team as Senior Verification Engineer. We are looking for an adaptive, self-motivated design verification engineer to join our growing team. The candidate will have an opportunity to work on state-of-the-art verification environment ...

VeeAR Projects Inc.
CA, United States

Title: CPU Design Verification Engineer. Handling schedules and supporting multi-functional engineering effort Assisting in verification flows, automation scripts and regressions. Work closely with architecture and RTL designers on verifying the functionality correctness of the design. Write asserti...

DBSI Services
Cupertino, California

Position Overview: We are seeking a talented Design Verification Engineer to join our team. Collaborate with design teams to define verification requirements and ensure alignment with design specifications. Participate in design reviews, offering insights on design for testability. Proficient in dig...

Tara Technical Solutions (TTS)
CA, United States

ASIC Verification advanced environment development using modern verification techniques (System Verilog and UVM); designing verification components such as UVM agents, and behavioral models; implementing coverage and assertions using System Verilog; and developing random & directed test cases agains...

DaVita Inc.
Mountain View, California

Solid experience as a Design Verification Engineer, focused on complex digital designs. AI HW Design Verification Engineer. Looking for a Senior Design Verification Engineer. Work with design teams to understand design requirements & contribute to the creation of verification plans & test be...

Synapse Design Inc.
San Jose, California

Strong scripting skills in calibre DesignRev - svrf scripting (Must) and tcl, Python/Perl(optional). DRC, LVS, ERC fixing methodologies through PnR tool scripting automation and expertise in hand-fixing capabilities. Strong scripting skills in Innovus-Tcl and Python/Perl(optional). Tools: calibredes...

Capgemini
Santa Clara, California

Senior E/E & Semiconductor Engineer - Design Verification Engineer-076748. Architect and Create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. Experience with advanced peripheral bus Verifi...

Synapse Design Inc.
Santa Clara, California

Senior Design Verification Engineer. At least 7+of experience in Design Verification. Scripting in Perl or Python programming skills. ...