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Staff Analog IC Design Engineer

Qorvo
San Jose, CA, US
$160.5K-$208.7K a year
Full-time

SUMMARY

Qorvo’s fast-growing Power Management division focusing on Power loss protection, PMICs, Motor Control, and Battery Management solutions for a wide range of Mobile, Consumer, IOT and Industrial applications is looking for an experienced Analog Power design engineer to create next generation and world-class designs in power management solutions.

RESPONSIBILITIES :

  • Collaborate with internal system engineers to architect and define new products for world-class analog power management ICs
  • Select the optimal topology and composition of designs to achieve the best possible performance, yield and testability.
  • Responsible for design and simulation per defined product functionalities and specifications
  • Collaborate with designers in Asia
  • Work with layout engineers to floorplan, optimize, and interconnect layouts
  • Work with test and characterization engineers to develop a thorough characterization and production test strategy as well as troubleshoot analog / digital design issues

Participate in design reviews, including presenting expected and / or actual results

QUALIFICATIONS :

  • PhD or MS in EE with a concentration in power, analog, and / or mixed-signal IC design. 10 years of experience.
  • Hands-on lab experience supporting high frequency switching power supplies in the semiconductor power management industry.

This includes bucks, buck-boosts, boosts, battery chargers, PMICs, and LDOs.

  • Strongly preferred - Understanding of different DC-DC power converter control methods including voltage mode control, current mode control, etc.
  • Experience in Power Management IC design techniques including layout and parasitic extraction
  • Experience with design tools such as Cadence and MATLAB. LabVIEW, Simplis, and ADS knowledge are highly desirable but not required.
  • Ability to communicate highly technical subject matters to others.
  • Good written and verbal communication skills.
  • Experience in Power Management design techniques including layout and parasitic extraction
  • Candidates with successful production release of power management ICs would be highly considered

LI-KA1

Competitive base salary commensurate with experience : $160,500 -$208,700, relevant for the California Bay Area (subject to change dependent on physical location)

Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience / qualification of the selected candidate as well as external competitiveness and internal comparability.

Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request.

30+ days ago
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