Search jobs > San Jose, CA > Asic design engineer

Senior ASIC Design Engineer

Cepton Technologies Inc.
San Jose, California, US
$150K-$180K a year
Full-time

Senior ASIC Design Engineer

Department : Hardware Engineering

Employment Type : Full Time

Location : San Jose, CA

Compensation : $150,000 - $180,000 / year

Please make sure you read the following details carefully before making any applications.

DescriptionCepton (Nasdaq : CPTN), a leading intelligent lidar solution provider, is seeking a seasoned Senior ASIC Design Engineer who is passionate about solving challenges to join us and support the development of Lidar products.

Working closely with our Director of ASIC Engineering and partnering closely with our brilliant functional R&D teams, you will work in a dynamic, cross-functional, collaborative work environment and be responsible for designing, verifying, and validating our core products.

Here at Cepton, we use technology to make some difficult problems become easy and some impossible tasks become feasible. We value one's ability to learn higher than the knowledge one has acquired in the past.

We like people who strive to solve a problem in new and creative ways instead of seeking conventional wisdom, we enjoy solving hard problems together.

As we are at the cutting edge of technological advancement, join us if you are willing to work with like-minded people to face the challenges posed by the new era of technology together.

What We Will Offer :

  • Opportunities to work with strong industry leaders and opportunities to relocate to Silicon Valley.
  • Competitive compensation package, including stock.
  • Comprehensive employee benefits program, including medical, dental, vision, life, disability, and more.
  • Paid time off and paid holidays.
  • Bonus program eligibility.
  • 401k, FAS, or HSA.

Location :

  • Cepton Headquarters San Jose, CA.
  • Some local on-site visits to key customers.
  • Travel to regional customer sites and support trade shows and conferences if needed.

Cepton is committed to fair and equitable compensation practices. The pay range for this role is $150,000 to $180,000. Actual compensation packages are based on several factors that are unique to each candidate, including but not limited to skill set, depth of experience, certifications, and specific work location.

This may be different in other locations due to differences in the cost of labor. The total compensation package for this position may also include an annual performance bonus, stock, benefits and / or other applicable incentive compensation plans.

Cepton Technologies is an Equal Opportunity Employer We are an Equal Opportunity Employer and do not discriminate against applicants due to race, ethnicity, gender, veteran status, or on the basis of disability or any other federal, state, or local protected class.

Key Responsibilities and Qualifications What You Will Do :

  • Partner closely with the functional R&D teams to develop design specification documentation for individual function blocks, RTL implementation, and system integration, and set up and maintain a verification environment.
  • Be responsible for tasks including DFT, synthesis, static timing analysis, power estimation, hardware troubleshooting, silicon bring-up, and validation.
  • Support new product introductions to the high-volume manufacturing process to enable automotive and non-automotive applications.

Who You Are :

  • B.S. or M.S. in Electronic / Electrical Engineering with at least three years of working experience in ASIC design.
  • Has deep knowledge of one or more of the following domains : Embedded CPU subsystem and architecture; High-speed digital signal processing, computer vision, or machine learning;

High-performance serial interface protocols; Low-power design methodology; mixed-signal design; FPGA prototyping.

  • Strong RTL (Verilog / System Verilog / VHDL) coding skills and hands-on experience in programming languages (Perl / Tcl / Python / C).
  • Has in-depth knowledge of high-speed digital design, multi-clock domain SOC, and verification; Has a good understanding of ASIC design flow from RTL to silicon.
  • Familiar with industry-standard EDA tools, advanced silicon processes, and technology nodes for high speed and low power consumption.
  • Has strong analytical skills and problem-solving ability and is able to provide technical leadership as needed.
  • A good and reliable team player with strong communication skills. Self-motivated, continually striving for excellence, and can thrive under pressure.

J-18808-Ljbffr

5 days ago
Related jobs
Promoted
Apple
Sunnyvale, California

Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture ...

Promoted
Enfabrica
Mountain View, California

Join an ambitious and highly experienced team of silicon and distributed systems experts as a RTL design engineer. We are looking for experienced designers who have the range to contribute across the full lifecycle of complex chip development, and who enthusiastically seek full ownership of large sc...

Promoted
Samsung Semiconductor
San Jose, California

We are currently looking for a Senior FPGA Engineer to join our team in San Jose, CA. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. He or she will join a team of experts in researching an...

Promoted
Teradyne
San Jose, California

We are looking for a Senior FPGA Design Engineer with outstanding technical and leadership skills. Our products integrate state-of-the-art digital and analog designs using leading edge ASIC and FPGA technologies, liquid cooling, and high density / high performance signal delivery. Provide technical ...

Promoted
Amazon
Sunnyvale, California

Participate in the validation of FPGAs using test benches, which can be reused for the ASIC implementation. Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, System C and DPI-C. Bachelor's degree in Electrical /...

Promoted
Nvidia Corporation
Santa Clara, California

Senior Mixed-Signal Design Verification Engineer. We are looking for an Engineer to verify the design and implementation of the world’s leading SoC's and GPU's. Understand sophisticated mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infr...

Gatik
Mountain View, California

Gatik is hiring for a HiL Design & Simulation Engineer. HiL design in the automotive industry. Basic knowledge of mechatronics and electromechanics of a vehicle. ...

Wipro
Sunnyvale, California

Job Title: ASIC/RTL/SOC Design Engineer. Logic design /micro-architecture / RTL coding is a must. Experience in Synthesis / Understanding of timing concepts for ASIC is required. Experience in design of DDR / USB /SATA/ PCIe controller or such complex protocols is a plus. ...

L&T Technology Services
Sunnyvale, California

Debug, root-cause and resolve functional failures in the design, partnering with the Design team. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality. Experience with Design verification of Data-center applica...

Astranis
CA, United States

As an RF Engineer you will be responsible for design, qualification, and procurement of active RF electronics (frequency converters, SSPAs, LNAs, PLLs, etc) in the RF front end of satellite payloads. You will work closely with other mechanical, payload systems, electrical, and software engineers to ...