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Senior Staff Design Verification Engineer

VirtualVocations
Sacramento, California, United States
Full-time

A company is looking for a Senior Staff Design Verification Engineer to join their team.Key ResponsibilitiesDevelop verification plans based on design specifications and technical requirementsDesign, implement, and maintain verification environments, including testbenches and simulation modelsCreate and execute test cases to validate hardware designs' functionality and performanceRequired QualificationsBSc / MS / PhD in EE / CE / CS, or equivalent8+ years of experience in RTL Design Verification (Verilog / SystemVerilog)Experience with SV / UVM for design / RTL verificationFamiliarity with various verification tasks including test plan and test bench developmentExperience managing a team of 2 to 5 DV engineers is a plus

23 hours ago
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