At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Specific responsibilities will include :
- Design and implementation of Tensilica software tool chain, in particular the instruction set simulator (ISS) for RISC-V processors
- Development of software models for RISC-V processor features for functional, cycle-accurate, and HW / SW simulation.
- Enhancements and maintenance of the existing RISC-V simulator
- Verification of software models in hardware-software co-simulation environment
- Integration of the RISC-V instruction set simulator with 3rd party system modeling environments
Requirements
- MS or PhD in Computer Science or Electrical / Computer Engineering
- Bachelors in computer science or electrical Engineering + 7 years of related experience, or Masters + 5 years of related experience.
Outstanding candidates with PhD and no industrial work experience will be considered.
- Strong C / C++ development skills
- Knowledge of ISA, CPU micro architecture, and assembly
- Knowledge of SystemC and TLM methodologies
- Experience with GNU development tools and / or Microsoft Visual Studio environment
- Experience with modeling tools for performance analysis or Hardware / Software Co-simulation
- Experience in Electronic design automation (EDA) flow
- Experience developing software on Linux environment
- Ability of reading specification and standard documents, and retrieving needed knowledge from various resources
We’re doing work that matters. Help us solve what others can’t.
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