Responsibilities
- Digital design lead for DDR5 PMICs, Hub(s)
- RTL code and verification methodology
- Develop the IP
- Full chip integration
- Verilog modeling
- Guide verification team for the code coverage
- Develop the next generation of products.
Qualifications
- Bachelor’s or master’s Degree with 7+ years of professional experience
- Strong background in Digital RTL design experience
- Familiarity with industry standard interface protocol such as I3C, I2C, SMBus
- Familiarity with DDR5 DRAM, DIMM topology and overall, DIMM operation
- Ability to document design techniques, test, and verification methodology.
- Python / perl script development
- Interface with debug, test, product, and reliability engineers for product qualification
- Interface with application engineers for customer support
About Rambus
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing.
With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads.
Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.
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