Semiconductor Layout Engineer

Software Engineers (Semiconductor Layout Engineer)

Cupertino, CA / Austin, Texas

Fulltime Role

• Deep knowledge and understanding of the following layout categories :
• analog / mixed-signal
• power device
• RF / analog layout
• RF transceivers
• low noise, low power data paths
• memory layout
• complex custom digital layout
• layout floor-planning and hierarchical layout assembly
• Knowledge of analog / mixed-signal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)
• Knowledgeable in layout techniques for device matching, minimizing parasitic, RF shielding, high frequency routing, isolation concepts, crosstalk, electro-migration, IR drop, power routing, and ESD / latch-up
• High degree of understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE, etc
• Basic understanding of circuit design

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