SoC RTL Design Engineer
Summary
Posted : Jun 13, 2023
Role Number : 200484552
At Apple, phenomenal ideas have a way of becoming great products and customer experiences very quickly. The industry is accustomed to Apple taping out the SOC's for our various products at a rigorous pace.
In order to achieve this, Apple's best-in-class chip is driven by top notch design engineers who implement various blocks of the chip and deliver high quality components to SoC.
This is a high transparency and critically important role and requires close working relationships with many groups and an organized approach to coordinate all tasks in parallel to hit schedules consistently with a quality design.
Our position requires in-depth knowledge of the chip micro-architecture and digital logic design..
Description
Work with architecture team to define the design microarchitecture hierarchy and interfaces and develop microarchitecture spec.
Refine the spec with reviews with other teams - Develop RTL design of one or more blocks following established design guidelines based on microarchitecture spec.
Own all aspects of RTL development design. - Work and collaborate with other designers in the group to deliver results. - Integrate common / shared IP blocks to design and optimize memories / hard macros required for the block - Work with front-end synthesis / STA teams to ensure timing for the block is met - Work with power / performance and functional verification team to ensure high quality of the block - Work with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process
Key Qualifications
- A consistent track record of dedication designs in high volume production for low power applications
- Experience in driving microarchitecture and developing specification for logic designs
- Consistent record of RTL design on large sophisticated designs
- Solid working experience with synthesis, power, performance and verification team to develop and deliver high quality RTL design timely
- Strong interpersonal skills are a must, as the candidate will talk to a lot of diverse groups within the company
- Self-starter, highly motivated, highly organized, and schedule driven is a must
- Familiarity with all front-end tools including lint, CDC, synthesis is a plus
- Knowledge of high speed DRAM memory controller design or interconnect design is highly preferable.
Education & Experience
Minimum of BS + 10 years relevant industry experience
Additional Requirements
More
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