Vice President, General Manager Platform, Debug, and Security (iVE)

Job Details : Job Description : About the Intel Validation Engineering Group (iVE)iVE is essential to Intel’s product leadership.

We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth.

We play a critical role in completing the Product Release Qualification of Intel products and in Intel’s ability to deliver the annual technology platforms in our roadmap with zero customer escapes at the right velocity.

Responsibilities : Responsible for delivering several critical capabilities and functions for iVE and DEG including Pre-silicon platforms : Emulation / FPGA, Hardware : boards, mechanical / thermal solutions, test chip platforms, interposers, debug solutions to all Intel groups and to external customers and security assurance for fix validation and prevention.

These capabilities enable the high quality, on time and efficient system level validation of all Intel's Client, Data Center, and Networking products.

Owns the strategy and roadmap for validation platforms, tools, and hardware, ensuring scale, efficiency, and consistency across projects.

Security milestones sign off, and Intel Platform Update validation for all patches. Collaborates with design, manufacturing, and product / platform groups to make companywide improvements to design.

Works with top leadership to create programs, platforms, tools, processes, and patterns to validate Intel products. Accountable for execution of a large, complex roadmap and ensuring the organization consistently meets or exceeds commitments.

Leads a large, global engineering team, providing direction, support, and creates a healthy organizational culture. Manages partner relationships with internal and external customers.

Engages and influences a broad array of stakeholders, customers, and suppliers across Intel and the broader SoC ecosystem.

In addition, this role involves driving Intel level strategy for Emulation / FPGA capabilities, and leading DEG emulation center of excellence.

Experience Required : Senior leader with strong technical expertise and leadership experience across several domains in the PLC (Arch, Design, Verification, Val, FW / SW).

Expertise in Pre Silicon Systems, Emulation and FPGA prototyping, and EDA Industry landscape.End to end view of validation from Functional, Electrical, Power / Perf, SW aspects.

End to end systems level expertise - able to drive strategy, planning and execution at integrated RTL, FW, BIOS, Platform levelTrack record of driving technology innovation that makes tangible product impact across roles.

Strong inspiring global org leader building technically diverse impactful orgs with strong TLP Consistent high EES, MDF scores.

Strategic thought leader with deep connections to industry expertise and ability to balance strategy, execution, and risk-taking while demonstrating Intel cultural attributes focused not only the what but the how results are achieved.

Demonstrated success of leading and delivering high complexity products from design to PRQ with high quality and on schedule.

Has a track record of successfully delivering SoC products on time, within budget, and with the expected level of quality and performance.

Proven dynamic people leader able to motivate, excite, energize, and grow teams to see and achieve a vision, innovate, and attract strong talent.

Qualifications : Bachelor’s degree 15+ years’ experience in CS / EE / CE or other appropriate technical field of study with a background in server product design from end-to-end, or Master’s degree or PhD 12+ years' experience in CS / EE / CE or other appropriate technical field of study with a background in server product design from end-to-end.

10+ years of Executive level experience with organizational leadership capabilities and the ability to drive positive change with strong executive-level communication skills.

10+ years of Leadership experience in managing and growing large global technical teams, while building respect and influence with multiple stakeholders and customers is critical.

This leader is expected to establish a strong, positive organizational culture.Job Type : Experienced HireShift : Shift 1 (United States of America)Primary Location : US, California, Santa ClaraAdditional Locations : US, California, Folsom, US, Oregon, Hillsboro, US, Texas, AustinBusiness group : In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products.

From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.

DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement : All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks.

For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits : We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.

Find more information about all of our Amazing Benefits here : Annual Salary Range for jobs which could be performed in US, California : $999.

00-$999,999.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

In certain circumstances the work model may change to accommodate business needs.SummaryLocation : US, California, Santa Clara;

US, Oregon, Hillsboro; US, California, Folsom; US, Texas, AustinType : Full time