Sr Integrated Circuit Electronic Design Automation Technology Engineer - Hybrid - copy
Responsibilities
- Enhance Cadence design environment for circuit design community
- Cadence PDK development
- IC Physical Verification using Siemens-EDA Calibre suite of tools
- Critical problem-solving
- Technical documentation
- PERSON REQUIREMENTS
Due to compliance with . export control laws and regulations, candidate must be a . Person, which is defined as, a . citizen, a .
permanent resident, or have protected status in the . under asylum or refugee status.
YOU MUST HAVE
- Degree in Electrical Engineering
- USG Secret security clearance in good standing, or no known barriers to achieve a USG Secret security clearance
- Ability and willingness to work on-site (Hybrid, 3+) at the
oHoneywell Plymouth, MN facility (zip code 55441) preferred
oHoneywell, Clearwater, FL facility (zip code 33764)
oHoneywell, Phoenix (Deer Valley), AZ facility (zip code 85027)
WE VALUE
- Experience with Cadence suite of transistor-level design tools
- Experience with Siemens-EDA suite of transistor-level physical verification tools
- Strong scripting language skills ., SKILL, Perl, Shell, TCL and LINUX-OS experience
- Knowledge of compute cluster methods and considerations to enhance EDA compute capability
- Individuals who are self-motivated and able to work with appropriate guidance, who consistently take the initiative to get things done.
- Ability to create specific action plans, prioritize time and resources effectively
- Excellent communication skills (verbal and written) and data organization skills
- Proficiency with Microsoft Office suite (Excel, PowerPoint, Word, Teams) and web navigation
- Able to convey technical ideas and concepts through team discussions, presentations and in writing.
- Strong technical problem-solving skills
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