DutiesTA duties may include marking, leading skills development tutorials, office hours, and review sessions. Additional lead TA duties may include coordinating other TAs, lab / project grade management, and development of course materials (e.
g., test questions, marking schemes). TAs are expected to have availability during standard business hours (i.e., 9 : 00 AM to 5 : 00 AM).
TAs must be available, in person, for at least one of the CSC258 lab sessions; check the University's Timetable Builder for section times : https : / / ttb.
utoronto.ca ; This course also requires all TAs to be available to mark the final exam. The final exam date is determined by the Faculty of Arts and Science and the exam may be scheduled from Dec.
6-21. The exam schedule is released in November 2024. Every effort will be made to schedule and complete the exam marking within 5-7 business days after the final exam date.
There is a small chance TAs may be required to complete grading January 6-8 if the exam is scheduled the last few days of the exam period.
The University is closed for the holiday break between December 24, 2024-January 3, 2025. Minimum Qualifications see preferred qualifications Preferred Qualifications Must be enrolled in, or have completed, an undergraduate program in Computer Science (or a related field).
Must have hands-on experience with digital integrated circuits, with a past grade of A- or higher from CSC258 (or equivalent).
Must have a strong knowledge of assembly language, microcontrollers, and digital hardware design at the gate level. Experience with Logisim (Logisim Evolution) is required and experience with Verilog is an asset.
Previous experience instructing or TAing CSC258H1 (or similar) an asset.Relevant CriterionPrevious experience is the more relevant criterion than the need to acquire experience in respect of this posted position.