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Member of Technical Staff - HBM Design | Architecture

Micron
Allen, Texas, US
Full-time

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our Opportunity Summary :

For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies.

We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.

As an HBM Design Architect, you will be responsible for the design & development of next-generation HBM DRAM products. You will be part of a highly multi-functional team of technical domain experts collaborating closely with a distributed team of Design Engineering, Product Engineering, Process Development, Package Engineering & Business Units to implement a common goal of ensuring our future HBM roadmap is successful.

You will apply your deep understanding of memory array architectures, high-speed interface design, logic & custom circuit design, memory subsystem operation, high-performance computing architectures, and & 3D package integration to understand and analyze bottlenecks and propose innovative architectures to target best-in-class performance, power, cost, reliability and quality for Micron’s HBM product portfolio.

Job title and level can scale depending on experience and qualifications

In HBM DEG (High Bandwidth Memory - DRAM Engineering Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence).

The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison.

To provide greater detail, our HBM technology pertains to stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called TSV (Through Silicon Via).

This greatly increases the memory density in a package, while allowing very high-speed signal transmission. Furthermore, "high bandwidth";

is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design only.

Lastly, verification and testing (validation) of HBM is the most challenging due to the total size of the design and complexity of the functions, and in addition to craft, many innovations are needed for verification and validation of the HBM product, thereby making it uniquely exciting.

Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity.

Disclaimer) : While you may not exhibit all of the characteristics / skills listed below today, we are highly interested in a teammate who is motivated to grow in technical breadth and depth.

Suppose you are open to learning while being a valued member of a team of best-in-class engineers. In that case, we are determined to help build upon your existing foundation, while rapidly growing your individual and collaborative skills in this exciting and outstanding opportunity.

What’s Encouraged Daily :

Pathfinding to explore new architectures for future products and make recommendations after performing highly technical feasibility analyses

Focus areas within the team will include memory array architectures, on-die and off-die high-speed signaling, PHY & interface development, power delivery network planning and optimization, power consumption reduction, CMOS requirements identification, packaging technologies, and thermal modeling

Debug and identify root causes and solutions for pre-silicon and post-silicon issues encountered in current HBM products and architectures

Engage with Customers to support issues with current HBM architectures and find opportunities to innovate on future HBM solutions

How To Qualify :

Familiarity with DRAM operation and JEDEC specifications, preferably with the HBM product family

Knowledge and experience in digital (Verilog) and analog (FastSpice & Hspice) modeling and simulations

In-depth technical expertise in one or more areas - DRAM memory array design, high-speed clocking and interface development, logic and custom circuit design, power delivery optimization, CMOS & semiconductor device physics, and 3D packaging technologies

Proven track record of innovation and problem-solving in high-performance memory development

12+ years of relevant job / skill-related experience

Experience delivering highly technical solutions

What Sets You Apart :

BSEE or greater

In-depth technical expertise in one or more areas : RTL Design flow, in the DRAM process or Foundry process - DRAM product bring-up and debug - package technologies (TSV, hybrid bonding, interposers, etc)

Good verbal and written communication skills with the ability to efficiently synthesize and convey sophisticated technical concepts to other partners and leadership

A self-motivated, hard-working team player who enjoys working with diverse abilities and backgrounds

Having an innovative approach that is open to improving upon any of our processes or products.

Potential Team Member Locations :

Folsom, CA

Atlanta, GA

Allen, TX

The US base salary range that Micron Technology estimates it could pay for this full-time position is :

$158, - $298,

Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries of the position across all US locations.

Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training.

The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Additional compensation may include benefits, discretionary bonuses and equity.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.

Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.

Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on .

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

To learn about your

To learn more about Micron, please visit

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

30+ days ago
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