Senior Formal Verification Engineer
100% remote (work from any US location)
US Citizen or US Permanent Resident
6-12 months contract with possible extensions
Required Skills & Experience :
- Knowledge of SoC / CPU / GPU designs, VLSI, and digital logic design and verification techniques
- Experience with formal property proofs on industrial strength designs and architectures
- Deep understanding of SoC design and verification
- Good understanding of formal verification technologies / abstraction techniques
- Temporal logic assertion-based languages such as SVA or PSL
- Experience in using EDA formal tools
- Proficiency in scripting languages and excellent debugging skills
- Experience with Cadence Formal Verification tools such as JasperGold
- System Verilog and UVM methodology expertise
- Must have 5+ years of experience and BSEE, MSEE preferred
FormalVerification #UVM #JasperGold #SystemVerilog
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