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Senior Staff Engineer, Signal Integrity
Senior Staff Engineer, Signal IntegrityCelestica Inc. • San Jose, CA, United States
Senior Staff Engineer, Signal Integrity

Senior Staff Engineer, Signal Integrity

Celestica Inc. • San Jose, CA, United States
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Senior Staff Engineer, Signal Integrity

The Signal Integrity Engineer provides design guidelines and support to system architecture design, board layout, product bring-up, debug, validation, and factory builds. Performs testing, simulation, validation, and qualification of systems and makes design adjustments as needed.

The Signal Integrity Engineer works in cross-functional teams with other designers, customers, manufacturing engineering, and project leadership to ensure robust and high-quality product development. Enhance designs with feedback from reviews in areas such as manufacturing, test, supply chain, reliability, industrial design, and simulations.

Detailed Description

Performs tasks such as, but not limited to, the following :

  • Models high-density I / O's on PCBs, packages, connectors, and probe cards with respect to parameters such as reflections, bandwidth, and crosstalk.
  • Leads the design, development, and implementation of technical solutions for complex projects, involving multiple domains. Participates in project planning and scheduling.
  • Strong knowledge in simulation tools like Hspice, Sigrity, ADS, Ansys SIwave, HFSS 3D.
  • Strong knowledge in Signal Integrity and Power Integrity fundamental concepts.
  • Strong experience in Package and PCB modeling is required.
  • Keeps up to date with relevant industry knowledge and regulations.
  • Performs Transmission line & Via modeling and carries out experiments to validate modeling outcomes and methodologies.
  • Analyzes and reviews layout files related to Signal Integrity and Power Integrity problems.
  • Provides practical solutions to PCB / Package design teams based on simulation results and analysis.
  • Conducts Simulation of memory interfaces for Board and Package and High-Speed Serial IO interfaces for Board and Package.
  • Performs decoupling capacitor optimization and loop inductance analysis.
  • May be a recognized expert (go-to person) in one or more technical areas.

Physical Demands

  • Duties of this position are performed in a normal office environment.
  • Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data.
  • Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required.
  • Occasional travel may be required.
  • Typical Experience

  • 11 to 14 years.
  • Typical Education

    Bachelor's degree in electrical engineering or equivalent.

    Notes

    This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.

    All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

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    Signal Integrity Engineer • San Jose, CA, United States

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