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Analog Design Engineering Intern (San Jose)

Analog Design Engineering Intern (San Jose)

QorvoSan Jose, CA, United States
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Analog Design Engineering Intern

Qorvo supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home / IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace / defense.

Qorvo's Internship Program is designed for college students currently enrolled in an accredited Bachelor's, Master's, or PhD program. Qorvo offers real work experience, exposure to upper management, and the opportunity to pursue full-time opportunities, as available.

Qorvo's Internship Program offers :

  • Challenging, skill-building assignments
  • Mentoring and coaching from industry experts
  • Launch & Learns and other learning opportunities
  • Collaborative team-based work environment
  • Networking and social events
  • Final presentation to business leaders

Qorvo's Analog Design Engineering Internships are offered in our High Performance Analog, Advanced Cellular, and Connectivity and Sensors business groups. Specific projects and responsibilities will be determined based on the business needs at the time of the internship assignment.

Responsibilities may include :

  • Contribute to the design of an integrated circuit functional blocks including Bandgaps, Amplifiers, Current references, Comparators, general analog blocks, RF power amplifier, LNA, other general RF blocks
  • Meet performance requirements while also considering size, cost, footprint, and schedule
  • Work as a member of a team to contribute integrated circuit design schematics, simulations, and real lab data
  • Qualifications :

  • BS in Electrical Engineering must be completed. Accepting current Masters or PhD students
  • Experience with Cadence Virtuoso, Keysight ADS and electromagnetic simulation
  • Student must have completed some integrated circuit design coursework in analog / RF circuit design
  • Strongly prefer students with power management, signal chain, ADC, and high voltage gate driver background
  • Exposure to analog measurement equipment such as multi-meters and oscilloscopes preferred (power management design)
  • Software Exposure : Virtuoso, Maestro, ADS and EM simulation
  • Minimum average GPA of 3.5 in integrated circuit (analog and digital) design coursework
  • Strong collaboration skills
  • Self-Starter with good communication skills
  • Effective organization skills for systematic planning and scheduling
  • Strong written and verbal communication skills to convey complex technical information
  • Detail oriented to ensure design and delivery of high yielding products
  • Enjoys working in fast paced work environment
  • Competitive hourly pay commensurate with experience : $36 / hr-$48 / hr, relevant for the California Bay Area (subject to change dependent on physical location).

    We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

    We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.

    Qorvo is an E-Verify Employer. For more information, please see the Right to Work and E-Verify Participation posters.

    Nearest Major Market : San Jose Nearest Secondary Market : Palo Alto

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    Analog Design Intern • San Jose, CA, United States

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