Principal Layout Designer (I / O Layout Design - FPGA)

Job Description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, and communication? How about an opportunity to own a piece of a multi-billion dollar global organization? We offer all that and more at Microchip Technology, Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for workplace excellence.

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Job Description :

Microchip Technology Inc. has a Principal I / O Layout Design Engineer opening based in San Jose, CA. This engineer will be responsible for layout design, integration, and verification of complex analog circuitry (clocking, Rx, Tx) integrated into the I / O's of the FPGA.

• Layout complex analog circuits for GPIO, HSIO, high-speed DDR and other IO applications in advanced FinFET nodes.
• Collaborate closely with the design leads to understand the design requirements and implement them in layout to meet performance specs.
• Ownership of both I / O block level and top-level layout of complex I / O blocks to be integrated at chip top.
• Work closely with the I / O layout lead and ASIC team to optimize IO floor plan, placement and routing of power and critical signals.
• Run ERC, DRC, LVS and EMIR and other checks. The ability to customize DRC and LVS decks is a plus.
• Layout guidance and mentorship of junior engineers.

Requirements / Qualifications :

Travel Time : 0% - 25%

Physical Attributes : Feeling, Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements : 15% standing, 15% walking, 70% sitting, 100% In doors; Usual business hours

Pay Range : We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below : Benefits of working at Microchip

The annual base salary range for this position, which could be performed in California, is $70,000 - $163,000.

Machinery Technology Inc is an equal opportunity / affirmative action employer. All qualified applicants will receive consideration for employment without regard to, , , , , , , , protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights : Workplace Discrimination is Illegal Poster.

Microchip Technology Inc does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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