Intel Corporation • Santa Clara, CA, United States
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Welcome!
## .Senior Silicon Design Engineer page is loaded## Senior Silicon Design Engineerlocations : US, Texas, Austin : US, California, Santa Claratime type : Full timeposted on : Posted Yesterdayjob requisition id : JR0277768#
Job Details :
## Job Description : Intel Central Engineering Group is engaged with customers today starting with our existing foundry offerings. We are expanding at a torrid pace to include our most advanced technologies, which are ideal for high-performance applications, and they are completely dedicated to the success of its customers with full profit and loss responsibilities. Our Focus us to ensure the successful integration and adoption of Intel technologies by its original equipment manufacturers (OEMs), original design manufacturers (ODMs), and Design partners. This team serves as a critical technical interface, acting as the "voice of the customer" within Intel to drive product improvements and resolve issues throughout the entire product lifecycle.
The Senior Silicon Design Engineer
will be responsible for, but not limited to :
Performing physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power / clock distribution, reliability, and power and noise analysis.
Conducts verification and signoff, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Analyzes results and makes recommendations to fix violations for current and future product architecture.
Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
Optimizes design to improve product level parameters such as power, frequency, and area.
Participates in the development and improvement of physical design methodologies and flow automation.##
Qualifications :
The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork / classes / research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications :
Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study.
Experience in leading small team of engineers.
7+ years of experience with complex ASIC / SOC Implementation.
Experience in system and processor architecture.
Experience designing and implementing complex blocks like CPUs, GPU, Media blocks, and Memory controller.
Experience with System Verilog / SOC development environment.
Experience in scripting languages (i.e. PERL, TCL, or Python).
Experience with Hardware validation techniques (i.e. formal Verification, Test and Function Verification).
Preferred Qualifications :
Post graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study.
Experience with Industry standard protocols (i.e. PCIE, USB, DRR, etc)
Experience with interaction of computer hardware with software
Experience with Low power / UPF implementation / verification techniques.
Experience with Formal verification techniques.## Job Type : Experienced Hire## Shift : Shift 1 (United States of America)## Primary Location : US, Texas, Austin## Additional Locations : US, California, Santa Clara## Business group : Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.## Posting Statement : All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.## ## Position of TrustN / A
Benefits :
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here : Annual Salary Range for jobs which could be performed in the US : $161,230.00-303,140.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. \
Job posting details (such as work model, location or time type) are subject to change.
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Senior Design Engineer • Santa Clara, CA, United States
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