Search jobs > San Jose, CA > Design verification

Senior UVM Design Verification Engineer

DaVita Inc.
San Jose, California, US
Full-time

Submit your CV and any additional required information after you have read this description by clicking on the application button.

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded.

Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges.

We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance

THE ROLE :

We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market.

The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON :

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites / timezones.

You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES :

  • Develop / Maintain tests for functional verification and performance verification at the IP level
  • Build testbench components like drivers, monitors, checkers to verify next generation IP
  • Maintain or improve existing tests to support IP level testing
  • Triage regression results and debug failures
  • Analyze coverage data to drive stimulus quality

PREFERRED EXPERIENCE :

  • Must have proven number of years industry experience in UVM
  • Strong at System Verilog, UVM based testbench coding
  • Experience with functional verification of design IPs
  • Strong Knowledge of computer architecture
  • Good ability to write scripts in Perl / Python to enable automation
  • Any experience with protocols like PCIe, CXL, NVMe is an advantage
  • Good communication and strong problem solving skills

ACADEMIC CREDENTIALS :

Bachelors or Masters degree in computer engineering / Electrical Engineering

LOCATION : San Jose, CA

LI-DW1

LI-HYBRID

At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position.

You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan.

You'll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

J-18808-Ljbffr

4 days ago
Related jobs
Promoted
PsiQuantum
Palo Alto, California

This experienced Senior Mechanical Design Engineer will join PsiQuantum's Mechanical Engineering team in the design and specification of components and assemblies to package advanced electronic and optical modules in rack-mounted chassis and other enclosures, and develop engineering layouts for mult...

Promoted
Critical Mass
San Jose, California

The Senior Creative Engineer independently creates production design solutions like image assets, display and social media banner resizes, digital layout refreshments and digital templates, also provides supervision and oversight during the process and ensures that these solutions meet business requ...

Promoted
Nvidia Corporation
Santa Clara, California

Senior Software Engineer - Design-For-Test. We are now looking for a Senior Software Engineer - Design-For-Test. Work with Design architecture team to understand new feature request specification, and implement these features. Design-For-Test, or Software development, or in fields related to Silicon...

Promoted
https:/www.energyjobline.com/sitemap.xml
Santa Clara, California

We are looking for an adaptive, self-motivated design verification engineer to join our growing team. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. You have a passion for modern, co...

Promoted
Cadence Design Systems
San Jose, California

Senior/Returnship, Signal Integrity (SI) and Power Integrity (PI) - Principal Applications Engineer. Design experience and industry knowledge of Signal, Power, and Thermal analysis for IC, package, and PCB designs are required. Are you looking to re-enter the workforce as an Application Engineer aft...

Promoted
https:/www.energyjobline.com/sitemap.xml
Santa Clara, California

Master of Science or foreign equivalent degree in Electrical Engineering, Computer Engineering or related field with strong analog design background (or equivalent experience). Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like Spectr...

Promoted
DaVita Inc.
San Jose, California

This is an exciting opportunity to work in the AMD SOC Verification Team as Senior Verification Engineer. The candidate will have an opportunity to work on state-of-the-art verification environment using UVM verification methodology and C. We are looking for an adaptive, self-motivated design verifi...

NVIDIA
Santa Clara, California

Experience with assertion-based verification, Semiformal Verification (SFV), Unified Verification Methodology (UVM), SystemVerilog checkers and scoreboards. NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world’s leading GPUs. BS or MS in electrical engineering or computer e...

TechEra Global Inc
Cupertino, California

Design Verification Engineer</p> <p>Location: Cupertino, CA (Onsite)</p> <p> </p> <p><span style="font-size:11pt"><span style="font-family:Calibri,sans-serif"><b><span lang="EN-US" style="background...

BAE Systems
San Jose, California

We are looking for a senior level chip designer who has strong proficiency in both. ASIC design- performing architecture design, RTL coding/simulation, timing closure at layout phase. Build verification environment using SV/UVM methodology. Desired majors Electrical Engineering, Computer Engineering...