Job Description
This is an opportunity to join a top-notch Power Management IC Team with Renesas’ leading Power Business Unit. You will be part of a very skilled group of engineers who are helping build world class automotive PMIC products that will power tomorrow’s automobiles.
You will design complex chips that include various analog and digital control circuitry and work very closely with all aspects of chip design from writing specifications to developing tests for mass production.
You will be a key contributor to the digital design team and work closely with the analog design team for design integration, as well as the applications and test engineering teams for validating and testing your on-chip solutions.
You will have an opportunity to work on new designs, develop new standards and shape the company’s pathway to success. Your responsibilities will be a mix of the following :
- Ensuring digital development process is state-of-art and achieves budget schedule and project deliverable goals.
- Designing digital RTL that meets timing, area, power and any adhering standards specifications.
- Integrating design at the top level and running block & top-level simulations.
- Participate in all aspects of Mixed-signal design flow - Micro-architecture, Design partitioning, RTL Verilog / SystemVerilog Design, Generating Timing Constraints, Synthesis, Interaction with P&R Team, Timing Analysis, LINT, CDC.
- Working closely with P&R team and supervise their work to generate a layout that meets timing, area, and power requirements.
- Support DFT strategy and implementation and verify test case development.
- Assisting with top level test-bench creation and running gate level simulations.
- Working with analog and digital verification engineers to come up with complex test scenarios for pre-silicon verification.
- Helping develop AMS, SystemVerilog or Verilog-real behavioral models for your circuits.
- Developing detailed design documents and helping writing chip level documents and collateral.
- Holding and participating in key design reviews and completion of various checklists.
- Support interview process for team members.
- Coach and mentor less experienced team members.
Working on-site is optional but taking pride in your work and having passion is a must!
Qualifications
- 15+ Years’ experience in digital design including 3-5 years at Principal Level.
- Proven track record of leading digital designs and creating successful products.
- Results oriented and able to deliver on time under tight schedules.
- Must be a team player and yet be an independent thinker with strong design fundamentals.
- Must have experience of conceptualizing and creating robust and understandable designs.
- The ideal candidate will have a solid understanding of synthesizable design, timing constraints and how their design implementation looks like on silicon.
- Must have experience with industry standard Synopsys, Cadence, Mentor and other tools used in flows.
- Attention to detail, accuracy, and good communication skills.
- Must have good written and verbal cross-functional communication skills.
- Have an analytical mind - be open to persuasion and have capability to persuade others.
Desirable
- Experience of contributing towards several silicon tapeout cycles from spec to mass production
- Knowledge of Verilog, Verilog-AMS or other modeling / coding languages
- Working knowledge of revision control tools such as SOS or SVN
- Domain Specific knowledge : A good understanding of one or more than one of the following will be a plus but is not required : I2C, SPI, AMBAPMIC (Power Management ICs) & Regulators
Education
- BSEE required (MSEE preferred)