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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at Cadence. The Cadence Digital and Signoff Group will offer you a dynamic environment in which you will work with innovative R&D and Customer Engagement teams to influence the development of software tools for advanced chip design platforms.
As a Principal Product Engineer for Liberate Trio, you will be partnering with R&D and fellow engineers on advanced nodes, features, and methodologies to support and improve our std-cell offering.
You will also work on customer activities, run competitive benchmarks, and develop flows and solutions for customers. Experience with Liberate is a plus.
Desired Skills and Experience
- IP (STD / IO / Memory / Mixed-Signal) characterization and modeling expertise
- Deep understanding of different Liberty formats : NLDM, CCS, ECSM, LVF, EM etc
- Hands-on experience with industry standard simulation engines (preferably Spectre)
- Understanding of Statistics, Monte Carlo and process variation involved at lower nodes (7nm, 5nm etc)
- Driver and assist customer engagement to sell and proliferate our technologies
- Coherent strong skills to debug customer problems and propose solutions
- Automation skills using Tcl, Python, Perl and shell scripting
- Bachelor / Master in EE with 5+ years of experience in the desired skills domain.
The annual salary range for California is $131,600 to $244,400. You may also be eligible to receive incentive compensation : bonus, equity, and benefits.
Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies, and work location.
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