Senior Engineer, Verification

Please Note :

To provide the best candidate experience with our high application volumes, we limit applications to a total of 10 over 6 months.

Advancing the World’s Technology Together

Find out exactly what skills, experience, and qualifications you will need to succeed in this role before applying below.

Our technology solutions power the tools you use every day including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more.

Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves.

Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

What You’ll Do

The Memory Solutions Lab (MSL) is part of Samsung’s Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory.

MSL’s vision is to solve key problems & optimize architecture solutions for Cloud & Data center environments. We are an integral part of Samsung’s strong R&D focus & lab innovation engine.

We work closely with development teams to bring feature innovation to product roadmaps.

We are currently looking for a Senior Verification Engineer to join our team in San Jose, CA. He or she will join a team of experts in researching and developing innovative data center / cloud networking, storage, and compute ASIC / FPGA and system solutions.

The candidate will primarily focus on the RTL verification activities and will perform RTL design activities as needed. The ideal candidate must have prior experience developing Verification architecture and design of leading-edge networking, storage, embedded computing ASIC and / or FPGA.

Location : Hybrid, working onsite at our San Jose, CA headquarters 3 days a week, with the flexibility to work remotely the remainder of your time.

Responsibilities :

• Verify internally developed RTL IP using 3rd party NVMe Verification IP
• Develop NVMe Verification test suite to test internally developed RTL IP
• Expertise in developing block level / system level verification environment
• Expertise to develop BFMs / Checkers / monitors / Scoreboards
• Experience in developing block / system level verification plans and tests
• Must have capability to debug test failures to find the root cause
• Working experience in Simulation tools like Synopsys UVM or Mentor Modelsim / Questasim, Synthesis tools, Coverage tools, and Regression tools
• Working experience in IP / SoC verification using AMBA AXI, DMA, FIFO, etc. modules
• Knowledge of scripting languages like Perl, Tcl
• Contribute to RTL design and FPGA based emulation activities
• Work with other hardware / software architects developing one of a kind innovative FPGA prototype, contribute to feasibility studies & developing solutions
• Familiarity with Lab bringup of RTL in FPGA environment
• Assist architects developing Linux / Windows device driver, test and debug

What You Bring :

• Bachelor's with 5+ years of relevant industry experience, or Master's with 3+ years or PhD in data science engineering or related technical field preferred
• Prior Verification experience required
• In depth expertise in PCIe interface technologies desired
• In depth background in Verification development, debug, simulation, test bench
• Must be highly motivated with excellent verbal and written communication skills.
• Demonstrated attention to detail
• Ability to meet aggressive project deadlines in a team environment.
• Ability to work successfully with cross-functional teams, including coordinating across organizational boundaries and geographies.
• Ability to create near term value within a strategic research environment
• Exposure to CXL, NVMe block storage protocol highly desired
• Exposure to VIP based verification.
• Exposure to ARM instruction set architecture and development for ARM processors highly desired
• Exposure to Avery, RTL and FPGA development highly desired
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

What We Offer :

The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training.

We also offer incentive opportunities that reward employees based on individual and company performance.

This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones.

In addition to the usual Medical / Dental / Vision / 401k, our inclusive rewards plan empowers our people to care for their whole selves.

An investment in your future is an investment in ours.

Equal Opportunity Employment Policy :

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

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