Principal Mixed Signal IC Engineer
A company is looking for a Principal Mixed Signal IC Design Engineer to design, develop, and verify read-out ICs for image sensors.
Key ResponsibilitiesDesign and develop mixed-signal integrated circuits for image sensorsCollaborate with cross-functional teams to meet customer requirementsProvide CAD support and lead chip-level floor planningRequired QualificationsBachelor's degree in STEM with 7 years of experience or a Master's degree with 5 years of experienceExperience in mixed-signal full-custom CMOS IC design at the transistor levelKnowledge of semiconductor device physics and IC layout methodologiesAbility to hand layout critical analog and mixed-signal circuitsU.
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Principal Mixed Signal IC Engineer
A company is looking for a Principal Mixed Signal IC Design Engineer to design, develop, and verify read-out ICs for image sensors. ...
Analog/Mixed-signal IC design - SummerIntern
Seeking an Analog/Mixed-signal IC design engineering student to develop ICs for EVs, Industrial Control, Industrial Power and Green Power applications. Depending on the experience level and the design stage of the projects at the time of the internship, the individual will participate in block archi...
Mixed Signal Circuit Design and Tool Flow Methology Engineer
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gen...
Principal Data Engineer, Signal Processing
For purposes of this policy, “protected characteristics" include an individual's actual or perceived race, color, creed, religion, national origin, ancestry, citizenship status, age, sex or gender (including pregnancy, childbirth, lactation and related medical conditions), gender identity or gender ...
Senior Principal IC (RTL to GDSII) Design Implementation Solutions Engineer
Senior Level Applications Engineer position with Deep Cadence or Synopsys place and route tool knowledge (Physical Synthesis, PnR, CTS, Static Timing Analysis) experience and knowledge are required. In addition, Solutions Engineers are expected to be able to articulate design methodologies involving...
Spring Co-Op, Mixed-Signal Modeling and Verification Engineer (UL- 64000148)
Additionally, Cirrus Logic is an Equal Opportunity/Affirmative Action Employer, and we do not discriminate on the basis of race, color, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, gend...
Digital IC Implementation, Principal Application Engineer
BS degree Computer Science/Engineering, Electrical, Engineering, or related field8+ years of design/EDA experienceStrong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is requiredPrior experience with IC digital implementation flows and backend EDA t...
IC Physical Design Flow, Principal Solutions Engineer - AE
Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements . Strong analytical & analysis skills covering digital implementation is critical. The ideal candidate will be energetic, innovative and enthused with...
PHY and Mixed Signal IP Engineer
AMD together we advance_ THE ROLE: The candidate will join a highly visible and influential team of physical interface (PHY) and mixed signal IP experts tasked with integration and support of 3rd Party SERDES and mixed signal IP across all AMD products. AMD and its subsidiaries are equal opportunity...
Analog/Mixed-signal IC design - SummerIntern
Seeking an Analog/Mixed-signal IC design engineering student to develop ICs for EVs, Industrial Control, Industrial Power and Green Power applications. Depending on the experience level and the design stage of the projects at the time of the internship, the individual will participate in block archi...