Please Note
1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In >
Create Account)
2. If you already have a Candidate Account, please Sign-In before you apply.
Job Description :
The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs.
The candidate will be joining a high performance design team responsible for state-of-the-art subsystem development to meet customer requirements.
The engineer will be responsible for a variety of advanced design tasks such as : Discuss the SoC requirements with the customer and the internal teams.
Define micro-architectures and provide a specification; RTL development; Synthesis and timing analysis; Design Analysis including Lint / CDC / RDC.
This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing coverage results.
Candidate must be a highly productive individual contributor with a demonstrated technical capability in system and sub-block level design.
Job Requirements :
- A Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent
- 12+ years relevant industry experience
- Experience in design at SoC level and block level
- Define micro-architectures and provide a specification
- Fluent knowledge of RTL development (Verilog, System Verilog, Synthesis tool, Timing analysis, Lint, CDC and RDC)
- Strong working knowledge of Perl and other script languages
- Strong and independent design debugging capability
- Strong verbal and written communication skills. Must be comfortable working with the customers and also with internal teams (verification team, physical design team and the IP teams)
- Demonstrated ability to analyze and resolve complex design issues
- Must have legal authorization to work in the US
The candidate should have expertise in some (or preferably all) of the following areas :
- Experience with database management software (DesignSync, GIT, etc)
- Experience working with Emulators and FPGA based prototyping
- Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred
- Experience in ASIC design verification flows and DV methodologies including UVM, SystemC / C++ and other programming language
Additional Job Description :
Compensation and Benefits
The annual base salary range for this position is $126,000 - $210,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package : Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.
We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Sr. ASIC Design Engineer, DDR IP (Silicon Engineering)
ASIC DESIGN ENGINEER, DDR IP (SILICON ENGINEERING). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). Own the high qu...
Sr Principal Design Engineer - SoC system architecture
The CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence IP products in system reference designs. Our IP designs are used by leading semiconductor developers and companies, and our customers are shipping billions of chips annually using ...
Staff Engineer, SOC Design
Demonstrated expertise in SoC hardware micro architecture and design in the area of data center storage chips. Deep understanding of flash memory controller architecture, and related IP design, verification, SOC implementation process and tools. Define chip level hardware architecture and design req...
Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). Closely co...
Media-IP SoC Performance Engineer
We are looking for a Media-IP SoC Performance Engineer to join our small dynamic team. These IPs are central to the customer experience in almost all of Apple’s products from Apple Watch, iPhone, iPad, MacBook, and next generation product lines. As a Media-IP SoC Performance Engineer, you will have ...
Principal SOC/ASIC Physical Design Engineer (Silicon Engineering)
PRINCIPAL SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). ...
IP Design Engineer
All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As a member of the team you ...
Design Verification Engineers (SoC-5, PCIe-5)
Description : Architect block and full-chip verification environments using HVLs and constrained random. Debug RTL and Gate simulations and work with design engineers to verify fixes. SOCs with embedded CPUs and mixed signal interfaces. Develop test plans and coverage metrics from specifications and...
Wireless SoC Low Power Design Engineer
Drive SoC low power micro-architecture, definition, implementation, and analysis- Own complex SoC power management, boot flow, clock and reset management- Write micro-architecture specifications and design specifications- Design, implement, and debug complex logic designs- Integrate complex IPs into...
IP Design Verification Engineer
IP Design Verification Engineer. Industry experience as Design Verification Engineer. IP Level Analog/Mixed signal simulation, UVM, high speed I/O Experience. Bachelor of Science in Computer Science, Electrical Engineering, or related fields. ...