Responsibilities
may include :
- Contributing to RF Antenna switch and Analog Circuit designs in SOI or CMOS with Cadence and ADS
- Generating and simulating EM models in HFSS for silicon design integration and validation
- Meeting performance requirements while also considering size, cost, footprint, and schedule
- Working as a member of a team to contribute design schematics, simulations, and real lab data
Qualifications :
- Currently pursuing an MS or PhD in Electrical Engineering
- Minimum GPA of 3.0
- Analog / RF circuit design coursework and / or experience
- Experience in CMOS / SOI tape-out and Lab characterization using spectrum analyzers and network analyzers preferred
- Software exposure : Cadence, ADS or AWR
- Proficiency with Microsoft Office (Excel, Word, PowerPoint)
- Strong collaboration skills
- Self-Starter with good communication skills to convey complex technical information
- Effective organization skills for systematic planning and scheduling
- Strong written and verbal communication skills to convey complex technical information
- Ability to enjoy working in fast paced work environment
Competitive base salary commensurate with experience : $35.10 / hr - $45.63 / hr, relevant for the California Bay Area (subject to change dependent on physical location).
Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience / qualification of the selected candidate as well as external competitiveness and internal comparability.
Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request.
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