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Hardware Engineering Technical Leader - Memory
Hardware Engineering Technical Leader - MemoryCisco Systems, Inc. • San Jose, CA, United States
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Hardware Engineering Technical Leader - Memory

Hardware Engineering Technical Leader - Memory

Cisco Systems, Inc. • San Jose, CA, United States
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The application window is expected to close on : 10 / 30 / 2025.

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

Meet the Team

The Cisco Component Quality and Technology team provides outstanding customer value through technical innovation and quality solutions. We are seeking a driven and experienced technical authority in memory and storage components application to join our technical team. You will work directly with Cisco design, manufacturing, and quality engineering teams, as well as component vendors.

Your Impact

As a senior member of our Component Quality and Technology team, you will have the opportunity to serve as Cisco's domain authority in memory technologies, advising internal and external technical partners on the selection, validation, and qualification of memory components for Cisco products.

You will analyze and influence vendor roadmaps, participate in technical reviews and selection of memory components for Cisco's next-generation products. You will influence Cisco's design and engineering team to ensure the next generation of memory are recommended and integrated into our solutions.

Responsibilities

  • Collaborate with Cisco's design teams to enhance and improve memory reliability, availability, and serviceability (RAS) features across Cisco platforms.
  • Support supply chain and quality teams with technical expertise for supplier and component evaluations.
  • Lead investigations and end-to-end failure analysis for components and system issues, working with vendors to define, implement, and verify corrective and preventive actions (8D, RCA, etc.).

Minimum Qualifications :

  • BS / MS in Electrical Engineering, Computer Engineering, or related fields.
  • 8+ years experience in memory design / application OR Field Application Engineering.
  • Strong familiarity with JEDEC memory standards to guide and influence design decisions.
  • Experience working with DRAM ECC methodologies, including Partial Chipkill (PCLS) and Single Device Data Correction (SDDC) techniques, to enhance memory reliability.
  • Knowledge of various DRAM types (e.g., DDRx, HBM) used in server and networking applications.
  • Preferred Qualifications

  • Strong problem-solving skills and effective conflict resolution abilities.
  • Experience with semiconductor device reliability testing and characterization methods, such as HTOL, ELFR, LU and ESD
  • Experience in investigating component failures across NPI, mass production, and field returns, with knowledge of FA techniques.
  • At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put - we power the future.

    Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

    We are Cisco, and our power starts with you.

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    Engineering Leader • San Jose, CA, United States

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