ASIC RTL Design Engineer

IntelliPro Group Inc.
Fremont, CA, US
$110K-$300K a year
Full-time

Job Description

Job Description

Job description

Job Summary

We are seeking a skilled and innovative Design Engineer to join our dynamic team. The ideal candidate will be responsible for designing, developing, and testing complex systems and components.

This role requires a strong understanding of engineering principles and the ability to work collaboratively in a fast-paced environment.

The Design Engineer will play a crucial role in bringing projects from concept to completion while ensuring high-quality standards and adherence to project timelines.

Job Description

Responsibilities :

  • Lead RTL design, simulation, and verification for ASIC / SoC products, ensuring high-quality, efficient designs.
  • Integrate and validate IP blocks within the broader system, ensuring smooth functionality and compatibility.
  • Conduct Power, Performance, and Area (PPA) analysis to optimize design trade-offs according to both internal and external requirements.
  • Collaborate closely with the backend team, actively participating in RTL coding, implementation, and synthesis to ensure successful tapeout.
  • Develop and maintain reusable internal IPs, particularly suited for AI and in-memory computing applications.
  • Provide support for post-silicon testing and validation, diagnosing and addressing issues to confirm overall functionality and quality.
  • Mentor junior engineers by sharing expertise and best practices, fostering professional growth within the team.
  • Contribute to design reviews and cross-functional discussions, offering insights to enhance product performance and reliability.
  • Stay updated on RTL design advancements and integrate innovative techniques to improve product quality and efficiency.
  • Work closely with cross-functional teams, including software, architecture, and verification, to drive cohesive product development and delivery.

Requirements :

  • Master’s degree with 5+ years of experience or PhD in Electrical Engineering with a focus on RTL / SoC / digital design.
  • Proficiency in Verilog and System Verilog.
  • Experience with tools like VCS, Verdi, or other industry standards, and familiarity with pre-layout and post-layout simulation.
  • Understanding of the full design flow and capability to collaborate with the backend team.
  • Familiarity with AMBA APB AXI protocols.
  • Knowledge of RISC / ARM or similar core architectures.
  • Ability to develop innovative architectures and solutions tailored to client requirements.
  • Adaptability to a startup environment with skills to work independently and collaboratively, providing technical guidance to other team members.

Preferred Qualifications :

  • Experience in FPGA / ASIC design, especially in image processing systems.
  • Familiarity with SoC architectures (CPU, GPU, or accelerators).
  • Knowledge in UVM, place-and-route, STA, EM / IR / Power analysis.

Job Type : Full-time

Compensation Range :

Fremont, CA, USA : $110,000 - $300,000

Join our team as a Design Engineer where your expertise will contribute to innovative solutions that drive our projects forward!

Job Type : Full-time

Pay : $110,000.00 - $300,000.00 per year

Benefits :
  • 401(k)
  • 401(k)
  • 401(k) matching
  • Dental insurance
  • Health insurance
  • Life insurance
  • Paid time off
  • Vision insurance
  • Schedule :

    Monday to Friday

    Ability to Commute :

    Fremont, CA 94538 (Preferred)

    Ability to Relocate :

    Fremont, CA 94538 : Relocate before starting work (Required)

    Willingness to travel :

    25% (Preferred)

    Work Location : Hybrid remote in Fremont, CA 94538

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