Staff ASIC Design Engineer - Functional Safety
About us :
Aeva’s mission is to bring the next wave of perception to a broad range of applications from automated driving to industrial robotics, consumer electronics, consumer health, security, and beyond.
Aeva is transforming autonomy with its groundbreaking sensing and perception technology that integrates all key LiDAR components onto a silicon photonics chip in a compact module.
Aeva 4D LiDAR sensors uniquely detect instant velocity in addition to 3D position, allowing autonomous devices like vehicles and robots to make more intelligent and safe decisions.
Role Overview :
An ASIC Design Engineer with expertise in ISO-26262 functional safety standards. The ideal candidate will possess strong proficiency in ASIC / Silicon development - digital design, verification, and implementation, coupled with a deep understanding of safety-critical ASIC development processes.
What you'll be doing :
- Implement and ensure compliance with ISO-26262 functional safety standards throughout the ASIC design process. This involves conducting safety analysis and generating FuSA collateral, developing safety mechanisms, and ensuring the design meets Automotive Safety Integrity Levels (ASIL).
- Analyze RTL designs including third-party IP tools. Perform FMEDA analysis and generate FMEDA documents.
- Participate in and contribute to System Functional Safety Planning.
- Participate in and contribute to the negotiation of DIAs.
- Create, evaluate, and (in some cases) design (code) ASIC Safety Mechanisms.
- Lead Fault Simulation Campaign to uncover faults and demonstrate diagnostic coverage.
What you'll have :
- 5+ years of RTL design experience using SystemVerilog.
- In-depth knowledge of ISO-26262 as it relates to ASIC design.
- In-depth knowledge of Silicon automotive reliability standards.
- Previous experience creating DFMEAs, FMEDAs, and other ISO-26262 collateral documents.
- Leadership role in obtaining ISO-26262 certification of a complex semiconductor device.
- Previous experience conducting a Fault Simulation Campaign.
Nice to haves :
- Previous experience with ISO-26262-related software tools (management and tracking) such as Jama.
- Previous experience with RTL-level FuSa estimation tools.
- Previous experience generating a Functional Safety Plan and / or Functional Safety Manual.
What's in it for you :
- Be part of a fast-paced and dynamic team.
- Very competitive compensation and meaningful equity.
- Exceptional benefits : Medical, Dental, Vision, and more.
- Unlimited PTO : We care about results, not punching a timecard.
Salary : $181,300 - $245,300 a year.
Salary pay ranges are determined by role, level, and location. Within the range, the successful candidate’s starting base pay will be determined based on factors including job-related skills, experience, certifications, qualifications, relevant education or training, and market conditions.
These ranges are subject to change in the future.
Depending on the position offered, equity, bonus, and other forms of compensation may be provided as part of a total compensation package, in addition to comprehensive medical, dental, and vision coverage, pre-tax commuter and health care / dependent care accounts, 401k plan, life and disability benefits, flexible time off, paid parental leave, and 11 paid holidays annually.
J-18808-Ljbffr
ASIC Design Engineer - Neural Engine DMA
As an ASIC Design Engineer in the Pixel IP DMA team, you will work closely with architecture, design, and verification teams to build dedication and low power DMA engines. Experience working multi-functionally with architecture, design, and verification teams to specify, design, and debug designs. W...
Senior ASIC Design Engineer
We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. As a key member of the GPU Design team, you...
Staff Digital Ic Design Engineer
Our client, based in Santa Clara, CA is searching for a Staff Digital ASIC Design Engineer as follows:. Work with analog and system IC designers to define digital component requirements. Execute full digital flow, from functional requirements to layout, and eventually tape-out. Build environments an...
Staff Design, Signal Integrity and Power Integrity Engineer
Familiar with one or two scripting languages such as Python, Matlab for automation Stay current with industry trends, emerging technologies, and best practices in design, SI and PI design methodologies. Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or related fiel...
Technical Staff, Mechanical Design Engineer
Design and analyze mechanical systems, equipment and packaging. Conduct feasibility studies and testing on new and modified designs. Document designs with drawings, specification and materials list. ...
Senior ASIC Design Engineer, Memory Controller
NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer, you'll join a group of hard-working engineers to craft and implement innovative Memory Controllers for our Tegra SoCs!. As a member of our Memory Subsystem Design team, you will collaborate...
Staff Mechanical Design Engineer, Battery Module
As a member of the New Product Development organization, the primary objective is to execute design solutions for new battery module platforms, release drawings, support engineering validation of new designs and proposed changes, and support change management functions. This engineering position wil...
ASIC Design Engineer
THE PERSON: A successful candidate will have an SOC/ASIC Design background with experience in the industry, would have participated in several silicon design projects with increasing level of scope/responsibilities and has a history of achieving results through effective execution. THE PERSON: A suc...
ASIC Design Engineer – Fabric/Interconnect
Working closely with design verification and formal verification teams to debug and verify functionality and performance. Extensive experience in front-end ASIC RTL digital logic design using Verilog or System Verilog. With every generation the max bandwidth, the lowest latency, the lowest area, and...
ASIC/SoC Design Verification Engineer
Job Title: ASIC/SoC Design Verification Engineer Position Type: Full-Time / On-Site Location: Fremont, CA Salary Range / Rate: $110,000 - $300,000 Job ID#: 136685 Year of Experience: More than 8 years Responsibilities: 1. Collaborate with design engineers and architects to de...