Sr. Test Design Verification Engineer

Overview

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world.

Microsoft’s Silicon team builds custom silicon for a diverse set of systems ranging from high-performance Azure cloud servers, clients, AI and augmented reality to innovative consumer products like Xbox.

We are looking for a Senior Design Verification Engineer to work in the dynamic Microsoft Silicon Manufacturing Packaging Engineering team (SMPE).

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals.

Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

Qualifications

Required / Minimum Qualifications :

7+ years of related technical engineering experience

o OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience

o OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience

o OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

• 7+ years of experience in design verification with experience delivering complex SoC.
• 7+ years of experience in debugging (Verilog) designs as well as simulation and / or emulation environments.

Other Requirements :

Ability to meet Microsoft, customer and / or government security screening requirements arerequired for this role. These requirements include, but are not limited to the following specialized security screenings :

Microsoft Cloud Background Check : This position will be required to pass the Microsoft Cloud Background Check upon hire / transfer and every two years thereafter.

Preferred / Additional Qualifications :

• Experience with Joint Test Action Group (JTAG / Test Access Port (TAP) debug interfaces.
• In depth knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ based test environments.
• Experience with scripting language such as Python or Perl or Tcl / Tk.
• Experience in global SOC areas like Boot, JTAG , Clocking, Resets, Security, fuses etc.
• Understanding of SoC architecture.
• Experience interacting with 3rd party vendor on IP definition and sign-off.

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $112,000 - $218,400 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $145,800 - $238,600 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here :

Microsoft will accept applications for the role until June 28, 2024.

Responsibilities

The SMPE Silicon Team is seeking a computer / electrical engineer to deliver premium-quality designs once considered impossible.

We are responsible for delivering cutting-edge, custom Intellectual Property (IP) and System-on-Chip (SoC) designs that can perform complex and high-performance functions in an extremely efficient manner.

• Working across design, verification, architecture, process technology, and product engineering teams to build solutions that deliver test strategy and successful Silicon bring up readiness.
• Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM).
• Analyse and debug test failures with designers to deliver functionally correct design.
• Identify and write functional coverage for stimulus and corner cases.
• Develop, audit & execute the IP / Subsystem SoC level verification plan.
• Close coverage to plug verification holes and meet tape out requirements.
• Work with the product engineering teams on the delivery of manufacturing test patterns & assist with silicon bring-up.

Embody our and

Benefits / perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

Industry leading healthcareEducational resourcesDiscounts on products and servicesSavings and investmentsMaternity and paternity leaveGenerous time awayGiving programsOpportunities to network and connect