Cellular ASIC Design Integration Engineer
Summary
Posted : Mar 19, 2024
Role Number : 200543454
Do you love crafting elegant solutions to highly sophisticated challenges? Do you intrinsically see the importance of every detail?
As a member of our dynamic Cellular group, you'll be at the heart of chip design! You'll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions.
This high-visibility and critical role provides excellent exposure to multiple VLSI design technologies and flows. It also requires close working relationships with many functional teams!
Description
On our team you will have following responsibilities : - Contribute to definition, architecture, design and development of cellular sub system.
- Perform all aspects of front end design flow including integration, connectivity, releases, design checks, verification reviews, mbist, dft, synthesis, timing constraints.
- Perform power analysis and analysis different design tradeoffs and drive power improvements. - Develop design methodologies for scalable designs.
- Pre / Post silicon debug support.
Key Qualifications
This position requires thorough knowledge of the ASIC design flow, FE and design verification, synthesis, scripting, and netlist generation.
- Knowledge of ASIC / SoC design flow.
- Knowledge of FE tools (CDC, RDC, LINT, Formal, LP Checks, LEC, PTPX) and Synthesis and STA flows.
- Strong knowledge of RTL design and HDL languages (Verilog, System Verilog, etc.)
- Strong analytical skills to be able to make design tradeoffs for best performance, low area, and low power.
- Experience in driving power improvements based on power analysis tools / flows.
- UPF flow for defining the power intent of chips with multiple power domains.
- Experience in writing efficient design synthesis and STA constraints.
- Work with the DV team to come up with a thorough verification plan and drive coverage closure.
- Design interfacing with PD for floor planning and timing closure.
- Experience with version control tools and handoff of design releases.
- Strong scripting skills to automate tasks and build scalable design flows.
- Self-starter, highly motivated, highly organized, and schedule-driven, which is a must.
- Familiarity with DFT, MBIST, and backend-related methodologies and tools is a plus.
Education & Experience
BS and 10+ years of relevant industry experience.
Additional Requirements
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role.
The base pay range for this role is between $166,600 and $296,300, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs.
Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan.
You'll also receive benefits including : Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition.
Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
Note : Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
More
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
Learn more about your EEO rights as an applicant.
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