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Design Verification Engineer

Infineon Technologies
Dallas, TX, United States
Full-time
Part-time

As Design Verification Engineer, you will be responsible for verification of ICs focused on the Aerospace, Defense, and High Reliability market.

The HiRel verification team is a newly created team within the larger HiRel R&D organization. In addition to leading verification for rad hard ICs, this position provides a unique opportunity to join a team that is in the early phases of establishing the IC verification strategy for the organization.

Your work driving simulation and model development methodologies, identifying and developing critic verification tools / software, and analyzing IC behaviors in critical applications will help maximize our business opportunities across all designs at our strategic customer base.

Your experience in design verification and / or analog IC design and your ability to support a collaborative, innovative, resilient culture will be instrumental in your success. In your new role you will :

  • Drive the verification of mixed signal ICs using best practices & methodologies to achieve first pass silicon success
  • Create and verify block level models (system Verilog, VAMS, etc.) for utilization in top level mixed mode simulations
  • Develop application specific test benches with automated checkers to assess overall IC functionality and robustness
  • Collaborate with application, analog design and digital design leads to understand and verify system level and IC level functions and specifications
  • Partner with design team and provide initial analysis of errata found during the verification process
  • Provide specification, design review and test requirements documentation to guide test, validation, and product engineering to meet project targets
  • Foster a speak-up culture of collaboration, innovation, and resilience within the verification team.

You are best equipped for this task if you have :

  • or in Electrical Engineering or equivalent
  • 2+ years of experience in analog design or mixed signal design verification
  • Experience in UVM based design verification
  • Experience in modeling analog mixed-signal blocks such as bandgap ,oscillators, ADC, DAC, LDOs, gate drivers, and others
  • Knowledge of system verilog, VAMS or real number modeling
  • Experience writing checkers and assertions for top level parametric assessment and functional coverage
  • Knowledge using common EDA tools such as Cadence Virtuoso, Maestro, vManager, and others
  • Ability to drive a break the part mentality
  • Ability to persevere until all unexpected observations are driven to root cause and closure
  • Outstanding communication and leadership skills
  • Must be a team player and self-starter

Benefits

  • Medical, Dental & Vision Plans
  • Flexible Reimbursement Accounts (FSAs)
  • Industry leading 401k Employer Contribution / Match
  • Company Performance Bonus
  • Holiday Pay & Paid Time Off (PTO)
  • Flexible Working Conditions, Part-time Options
  • Different career paths : Project Management, Technical Ladder, Management & Individual Contributor
  • Wide range of Training Offers & Career Development Planning
  • Coaching, Mentoring, Networking Possibilities
  • International assignments
  • Basic Life & Dependent Life Insurance
  • Paid Sick Leave, Accidental Death & Disability Insurance (AD&D)
  • Short-term & Long-term Disability
  • Employee Assistance Program (EAP)
  • Health Promotion Programs
  • Reduced Price for Public Transportation
  • 26 days ago
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